Verilog quickstart: a practical guide to simulation and synthesis in verilog

Lee, James M.

dc.contributor.author	Lee, James M.
dc.date.accessioned	2015-09-08T19:26:42Z
dc.date.available	2015-09-08T19:26:42Z
dc.date.issued	2002
dc.identifier.citation	New York : Kluwer Academic Publishers, 2002	en_US
dc.identifier.isbn	0-7923-7672-2
dc.identifier.uri	http://hdl.handle.net/123456789/610
dc.description.abstract	The Verilog language has been updated with the IEEE standardization. This third edition of Verilog quickstart has been updated to reflect the current best practices in use today.	en_US
dc.language.iso	en	en_US
dc.publisher	Kluwer Academic Publishers	en_US
dc.subject	Verilog (Computer hardware description language)	en_US
dc.subject	Verilog language	en_US
dc.subject	Procedural modeling	en_US
dc.title	Verilog quickstart: a practical guide to simulation and synthesis in verilog	en_US
dc.type	Book	en_US